X11 Family of Network Processors

Based on the highly efficient Dataflow Architecture, the X11 brings high function, low cost network processors (NPUs) to Unified Fiber Access and Metro Ethernet designs. With 24 embedded Ethernet MACs for GE or FE it can match solution cost for high-function Ethernet ASICs - while providing the benefits of programmability.

The X11 is designed for 20Gbps duplex Ethernet or 10G duplex Sonet/SDH, and can also be used for up to 40Gbps service card applications.

The chip features four 10 Gbps traffic interfaces that are individually configurable for maximum flexibility. Two can be configured as either XAUI or SPI-4.2 and two can be configured as either XAUI or 12xSGMII. The XAUI and SGMII interfaces feature integrated MACs for direct attachment of PHYs. The XAUI interfaces include support for a programmable preamble for use with proprietary XAUI-based switches.

Product Options

 
Packet Processing

SPI-4.2 i/f

GE i/f

10GE i/f
Service
Density
X11-d200 40 Gbps
60 mpps
2 24 4 1.00
X11-d240 40 Gbps
60 mpps
2 24 4 1.33
X11-d240t 40 Gbps
60 mpps
2 24 4 1.60

Integrated algorithmic search engines allow applications to use large tables at low cost with cost-effective DRAM for MAC, IPv4 and IPv6 tables. Automatic MAC address learning and ageing is supported. Use of external TCAM is optional.

Design Examples

Gigabit Ethernet Line Card

 

Example of a 24×Gigabit Ethernet line card. The single X11 handles processing of ingress and egress traffic for all interfaces for an Ethernet, MPLS and IPv4/IPv6 application.

10GE Line Card

 

Example of a 10GE line card design. The X11 features integrated 10GE MACs and connect to the 10GE phy over XAUI. This line card supports full duplex wirespeed processing of 20 Gbps.

The X11 NPU provides wirespeed L2-L4 processing for enterprise, unified fiber access and metro Ethernet systems.

See solutions sections covering Metro Ethernet, , Packet-Optical Transport and Unified Fiber Access for more design examples.

Product Family Highlights

Feature Benefit
40 Gbps and 60 mpps
programmable packet processing
Wirespeed packet processing for 10-20 Gbps line cards using a single chip
Ethernet optimized Integrated MAC and PHY for GE, integrated MAC for 10GE
Leading service density Parallel support for Carrier Ethernet, IPv4, IPv6 and MPLS in a single chip
Integrated TCAM and SRAM memories Efficient hashing and network search, support for mid-sized tables for e.g. statistics and metering
Off-chip TCAM, SRAM and DRAM Common access methods for directly connected off-chip memories from leading vendors, including cost-effective DDR3 DRAM for very large table sizes
Priority scheduling Support for expedited processing of critical traffic
Multicast copier Efficient IPTV distribution
Dataflow OAM Programmable OAM support, e.g. for link monitoring in IEEE 802.1ag

Target systems

  • 10 GE line cards
  • Ethernet pizza boxes
  • Sonet/SDH POS line cards
  • Enterprise backbone switches

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